bunnie's blog

How to Read SRAM Macros?

Above shows some details on the “rdram1kx32” RAM macro (“Macro D” from the competition) that makes up the data cache elements for the RV32 in the Baochip-1x. From the source code, we can see that this is a dual-port (1r/1w) RAM, organized as 1024 x 32 bits. I’ve rotated the RAM macro so that it’s in canonical “textbook” orientation, such that the columns go vertically and the rows go horizontally.

No Place to Hide?

Now that we understand a little more about the structure of the RAM macros, let’s return to the question of places where we could hide “a little bit” of extra memory. First, let’s observe that every SRAM bit is accompanied by some overhead circuitry. For various circuit-level reasons, it’s not possible to “just” lay down some extra-tiny SRAM cells without the supporting decoder, amplifier and driver circuitry.